Senior Engineer RTL Design

Position: Senior Engineer RTL Design Job Description: Principal Accountabilities * RTL development for ASIC / FPGA * Responsible for completion of front end design flow (spec to RTL / Netlist) * Design, micro architect & do RTL coding, Lint, CDC * Support existing sustenance designs * Collaborate with Hardware board design engineers for system level designs, Board level block diagram design and validation of hardware, utilizing the Company specified hardware design tools Job Complexity ? Requir…

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